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Ukeiley, Richard Larry

 Person

Found in 2 Collections and/or Records:

ADSL line card design, 2000

 Item — Call number MU Thesis Zha
Identifier: b2194994
Abstract The document discusses an ADSL (Asymmetric Digital Subscriber Line) line card project for broadband access. ADSL line card is a module installed at ATU-C side (ADSL Transmission Unit, Central), which provides ADSL line interface and PHY (Physical layer) mulitplex function. The document also describes the functional blocks on this card and focuses on the design of two sections: the control FPGA (Field-programmable gate array) and the LVDS (Low Voltage Differential Signaling) serial...
Dates: 2000

Design and simulation of a pipelined arithmetic and logic unit, 2002

 Item — Call number MU Thesis Gok
Identifier: b2089047
Abstract Modern microprocessors are designed to execute arithmetic and logical instructions in one clock time. Emerging microprocessors implement multimedia instructions as part of the Instruction Set Architecture (ISA) and expect to run them in a single clock cycle. Designing circuits to implement multi-media instructions that execute in a single clock cycle poses a serious challenge to microprocessor designers. Sustained performance of the Arithmetic and Logic Unit (ALU) is very critical to the...
Dates: 2002