Hardware design tool based on Xilinx State Machine method, 1998

Item — Call Number: MU Thesis Rod

Identifier: b2089700

Staff Only

Scope and Contents

From the Collection:

The collection consists of theses written by students enrolled in the Monmouth College and Monmouth University graduate Electronic Engineering programs. The holdings are bound print documents that were submitted in partial fulfillment of requirements for the Master of Science degree.

Dates

Creation: 1998

Creator

Rodríguez, Jobany (Author, Person)
Ukeiley, Richard Larry (Thesis advisor, Person)

Conditions Governing Access

All analog collection holdings are limited to library use only.

Researchers seeking to photocopy collection materials must complete an Application to Photocopy Form.

In some cases, photocopying of collection materials may be performed by the Monmouth University Library staff.

The Monmouth University Library reserves the right to limit or refuse duplication requests subject to the condition of collection materials and/or restrictions imposed by the collection creators or by the United States Copyright Act.

Permission to examine, or copy, collection materials does not imply permission to publish or quote. It is the responsibility of the researcher to obtain such permissions from both the copyright holder and Monmouth University.

Extent

1 Items (print book) : 69 pages ; 8.5 x 11.0 inches (28 cm).

Language of Materials

English

Additional Description

Abstract

This paper describes the Xilinx State Machine design methodology consisting of one flip-flop per state and only one state bit active at any time. This method is used for the design of a tool that will allow a designer to run a simulation and generate hardware of a state machine. The systematic approach of this design method facilitates the construction of such tool. This paper discusses the data required to represent the state machine and how it operates on the internal data structure to facilitate the automation of the results.