Field Programmable Gate Arrays and their applications to digital signal processing, 1998

Item — Call Number: MU Thesis Bal

Identifier: b2194801

Staff Only

Scope and Contents

From the Collection:

The collection consists of theses written by students enrolled in the Monmouth College and Monmouth University graduate Electronic Engineering programs. The holdings are bound print documents that were submitted in partial fulfillment of requirements for the Master of Science degree.

Dates

Creation: 1998

Creator

Balachandran, Preetha (1973- ) (Author, Person)
Ukeiley, Richard Larry (Thesis advisor, Person)

Conditions Governing Access

All analog collection holdings are limited to library use only.

Researchers seeking to photocopy collection materials must complete an Application to Photocopy Form.

In some cases, photocopying of collection materials may be performed by the Monmouth University Library staff.

The Monmouth University Library reserves the right to limit or refuse duplication requests subject to the condition of collection materials and/or restrictions imposed by the collection creators or by the United States Copyright Act.

Permission to examine, or copy, collection materials does not imply permission to publish or quote. It is the responsibility of the researcher to obtain such permissions from both the copyright holder and Monmouth University.

Extent

1 Items (print book) : 23 pages ; 8.5 x 11.0 inches (28 cm).

Language of Materials

English

Additional Description

Abstract

Application such as data communications and signal processing require extensive processing power, but when the DSP processing power is not sufficient, the only alternatives have been to add multiple DSP processors or use custom gate arrays. Multiple processor solutions are expensive, require many components, consume too much power and the solution does not always provide the performance needed to differentiate products. Custom gate array solutions deliver the performance but sacrifice flexibility. Field Programmable Gate Arrays have become a competitive alternative as they address the high performance DSP challenge. FPGAs offer a better solution for implementing computationally intensive algorithms; they can offer the flexibility of a programmable solution and the performance of a custom solution.

Advances in FPGA technology have enabled its use in the implementation of several signal processing functions such as filters and decoders. The application of FPGAs to the implementation of dedicated signal processing will be the main focus of this project. The project outline is as follows:

FPGA Review and Description
Applications of FPGAs to Signal Processing
FPGA based FIR filter architecture: Finite Impulse Response (FIR) filters are used in several data compression, signal processing and communication systems. FPGA based filter architectures which represent an alternative to general purpose DSP implmentations are described. These structures exploit bit level parallelism in order to attain high sampling rates.
Parallel Processing Architecture for Viterbi Algorithm: Convolutional codes are used for forward error correction in many communication systems. At the receiver, the information is recovered by carrying out Maximum Likelihood (ML) decoding. The state transitions of the encoder may be modeled using a trellis and the information is decoded by using the Viterbi Algorithm (VA) to efficiently search the trellis. Parallel procesing architectures for the VA that lend themselves to custom gate array implmentation are described.