RISC microprocessors
Subject
Subject Source: Library Of Congress Subject Headings
Found in 1 Collection or Record:
Design and simulation of a pipelined arithmetic and logic unit, 2002
Item — Call number MU Thesis Gok
Identifier: b2089047
Abstract
Modern microprocessors are designed to execute arithmetic and logical instructions in one clock time. Emerging microprocessors implement multimedia instructions as part of the Instruction Set Architecture (ISA) and expect to run them in a single clock cycle. Designing circuits to implement multi-media instructions that execute in a single clock cycle poses a serious challenge to microprocessor designers. Sustained performance of the Arithmetic and Logic Unit (ALU) is very critical to the...
Dates:
2002